Job Details:

Job Description:

Do Something Wonderful!

The world is transforming - and so is Intel. Intel is a company of bold and curious inventors and problem solvers who create some of the most astounding technology advancements and experiences in the world. With a legacy of relentless innovation and a commitment to bring smart, connected devices to every person on Earth, our diverse and brilliant teams are continually searching for tomorrow's technology and revel in the challenge that changing the world for the better brings. We work every single day to design and manufacture silicon products that empower people’s digital lives. Come join us and do something wonderful!

Who We Are

Do you love solving technical challenges and have a passion for design verification? Come join the DDR PHY IP validation team. We provide our IP to multiple SOCs at Intel. We work with cutting edge technology and the latest industrial design specifications.

Who You Are

The DDR PHY IP validation team is looking for a new hire to ramp and learn how to perform functional verification of IP logic to ensure design will meet specification requirements.

You will be responsible for, but not limited to: Develops IP verification plans, test benches, and the verification environment to ensure coverage to confirm to microarchitecture specifications. Executes verification plans and defines and runs system simulation models to verify the design, analyze power and timing, and uncover bugs. Replicates, root causes, and debugs issues in the pre-silicon environment. Finds and implements corrective measures to resolve failing tests. Collaborates with architects, RTL developers, and physical design teams to improve verification of complex architectural and microarchitectural features. Documents test plans and drives technical reviews of plans and proofs with design and architecture teams. Maintains and improves existing functional verification infrastructure and methodology. Participates in the definition of verification infrastructure and related TFMs needed for functional design verification.

Qualifications:

Minimum qualifications are required to be initially considered for this position. Preferred qualifications are in addition to the minimum requirements and are considered a plus factor in identifying top candidates.

Minimum Qualifications :
A Bachelor’s degree in Computer Science, or Electrical/Computer Engineering or related field and 1+ year of experience OR a Master’s degree in Computer Science, or Electrical/Computer Engineering or a related field AND

6+ Months of experience with the following:

• Knowledge of Computer Architecture
• Hands-on experience with System Verilog
• Object-oriented programming
• Exposure to verification methodologies and tools such as simulators or waveform viewers or build/run automation or coverage collection or gate level simulations.

Preferred Qualifications:

• 1+ year of experience with UVM
• 1+ year of experience working with memory technologies and interfaces.
• 1+ year of experience working with high-speed interfaces.

Requirements listed would be obtained through a combination of industry relevant job experience, internship experiences and or schoolwork/classes/research.

Job Type:

College Grad

Shift:

Shift 1 (United States of America)

Primary Location:

US, California, Folsom

Additional Locations:

US, California, Santa Clara

Business group:

The Client Engineering group (CEG) is a worldwide organization focused on the development and integration of SOCs, and critical IPs that power Intel's leadership products, driving the Client roadmap for CCG, and invest in future disruptive technologies.

Posting Statement:

All qualified applicants will receive consideration for employment without regard to race, color, religion, religious creed, sex, national origin, ancestry, age, physical or mental disability, medical condition, genetic information, military and veteran status, marital status, pregnancy, gender, gender expression, gender identity, sexual orientation, or any other characteristic protected by local law, regulation, or ordinance.

Position of Trust

N/A

Benefits:

We offer a total compensation package that ranks among the best in the industry. It consists of competitive pay, stock, bonuses, as well as, benefit programs which include health, retirement, and vacation. Find more information about all of our Amazing Benefits here: https://www.intel.com/content/www/us/en/jobs/benefits.html

Annual Salary Range for jobs which could be performed in

US, California:$91,500.00-$137,436.00

S al ary range dependent on a number of factors including location and experience.

Work Model for this Role

This role will be eligible for our hybrid work model which allows employees to split their time between working on-site at their assigned Intel site and off-site. In certain circumstances the work model may change to accommodate business needs.